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74AUP2G02 - Low-power Dual 2-input NOR Gate

Description

The 74AUP2G02 provides a dual 2-input NOR function.

Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V o 3.6 V.

Features

  • Wide supply voltage range from 0.8 V to 3.6 V.
  • High noise immunity.
  • Complies with JEDEC standards:.
  • JESD8-12 (0.8 V to 1.3 V).
  • JESD8-11 (0.9 V to 1.65 V).
  • JESD8-7 (1.2 V to 1.95 V).
  • JESD8-5 (1.8 V to 2.7 V).
  • JESD8-B (2.7 V to 3.6 V).
  • ESD protection:.
  • HBM JESD22-A114F Class 3A exceeds 5000 V.
  • MM JESD22-A115-A exceeds 200 V.
  • CDM JESD22-C101E exceeds 1000 V.
  • Low static power consumption; ICC = 0.9 A (maximum).
  • Latch-up performa.

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Datasheet preview – 74AUP2G02

Datasheet Details

Part number 74AUP2G02
Manufacturer NXP
File Size 173.07 KB
Description Low-power Dual 2-input NOR Gate
Datasheet download datasheet 74AUP2G02 Datasheet
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Full PDF Text Transcription

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74AUP2G02 Low-power dual 2-input NOR gate Rev. 7 — 4 February 2013 Product data sheet 1. General description The 74AUP2G02 provides a dual 2-input NOR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V o 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down. 2. Features and benefits  Wide supply voltage range from 0.8 V to 3.6 V  High noise immunity  Complies with JEDEC standards:  JESD8-12 (0.8 V to 1.3 V)  JESD8-11 (0.
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