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74HC138 3-to-8 line decoder/demultiplexer

74HC138 Description

74HC138; 74HCT138 3-to-8 line decoder/demultiplexer; inverting Rev.6 * 28 December 2015 Product data sheet 1.General .
The 74HC138; 74HCT138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7).

74HC138 Features

* Complies with JEDEC standard no. 7A
* Input levels:
* For 74HC138: CMOS level
* For 74HCT138: TTL level
* Demultiplexing capability

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Datasheet Details

Part number
74HC138
Manufacturer
NXP ↗
File Size
166.71 KB
Datasheet
74HC138-NXP.pdf
Description
3-to-8 line decoder/demultiplexer

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3-to-8 line decoder demultiplexer NXP
NXP 74HC138-like datasheet