74HC138D - 3-to-8 Line Decoder

Product Overview

Toshiba

Datasheet Details

Part number	74HC138D
Manufacturer	Toshiba
File Size	207.26 KB
Description	3-to-8 Line Decoder
Datasheet	74HC138D Datasheet
Additional preview pages of the 74HC138D datasheet.

Product details

Description

3-to-8 Line Decoder 2. General The 74HC138D is a high speed CMOS 3-to-8 DECODER fabricated with silicon gate C2MOS technology.It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.When the device is enabled, 3 Binary Select inputs (A, B and C) determine which one of the outputs (Y0 - Y7) will go low.When enable input G1 is held low or either G2A or G2B is held high, decoding function is inhibited and all outputs go high.G1

Features

(1) High speed: tpd = 16 ns (typ. ) at VCC = 5 V (2) Low power dissipation: ICC = 4.0 µA (max) at Ta = 25  (3) Balanced propagation delays: tPLH ≈ tPHL (4) Wide operating v.

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Published: Apr 8, 2017 |