Nexperia 74HC138
The 74HC138; 74HCT138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1, E2 and E3). This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with just four '138 ICs and one inverter.| Part No. | 74HC138 |
|---|---|
| Datasheet | 74HC138 Download |
| Manufacturer |  Nexperia |
| Description | 3-to-8 line decoder/demultiplexer |
| Buy | Stock & Price |
FEATURES AND BENEFITS
● Wide supply voltage range from 2.0 to 6.0 V● CMOS low power dissipation
● High noise immunity
● Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
● Demultiplexing capability
● Multiple input enable for easy expansion
● Ideal for memory chip select decoding
● Active LOW mutually exclusive outputs
● Input levels:
● For 74HC138: CMOS level
● For 74HCT138: TTL level
● Complies with JEDEC standards:
● JESD8C (2.7 V to 3.6 V)
● JESD7A (2.0 V to 6.0 V)
● ESD protection:
● HBM JESD22-A114F exceeds 2000 V
● MM JESD22-A115-A exceeds 200 V
● Multiple package options
● Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name
DESCRIPTION
74HC138D 74HCT138D -40 °C to +125 °C SO16 plastic small outline package; 16 leads; body width 3.9 mm 74HC138PW 74HCT138PW -40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm 74HC138BQ...
