74HC139 Description
74HCT139 decodes two binary weighted address inputs (nA0, nA1) to four mutually exclusive outputs (nY0 to nY3).
74HC139 Key Features
- Input levels
- For 74HC139: CMOS level
- For 74HCT139: TTL level
- Demultiplexing capability
- 2 independent 2-to-4 decoders
- Multifunction capability
- Suitable for memory decoding, data routing or code conversion
- plies with JEDEC standard no. 7A
- Active LOW mutually exclusive outputs
- ESD protection