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74LVC544A Octal D-type registered transceiver

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Description

74LVC544A Octal D-type registered transceiver; inverting; 3-state Rev.4 * 18 December 2012 Product data sheet 1.General .
The 74LVC544A is an octal registered inverting transceiver containing two sets of D-type latches for temporary storage of the data flow in either dire.

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Features

* 5 V tolerant inputs/outputs for interfacing with 5 V logic
* Wide supply voltage range from 1.2 V to 3.6 V
* CMOS low-power consumption
* Direct interface with TTL levels
* 8-bit octal transceiver with D-type latch
* Back-to-back registers for storage
* Separate control

Applications

* inputs/outputs are high-impedance when VCC = 0 V
* Complies with JEDEC standard:
* JESD8-7A (1.65 V to 1.95 V)
* JESD8-5A (2.3 V to 2.7 V)
* JESD8-C/JESD36 (2.7 V to 3.6 V)
* ESD protection:
* HBM JESD22-A114F exceeds 2000 V
* MM JESD22-A115-B exceeds 200 V
* CDM JES

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