MPC5746C - Microcontroller

Datasheet Details

1 × 160 MHz Power Architecture® e200z4 Dual issue, 32-bit CPU.
Single precision floating point operations.
8 KB instruction cache and 4 KB data cache.
Variable length encoding (VLE) for significant code density improvements.
1 x 80 MHz Power Architecture® e200z2 Single issue, 32-bit CPU.
Using variable length encoding (VLE) for significant code size footprint reduction.
End to end ECC.
All bus masters, for example, cores, g.

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Published: Jul 17, 2020 |