PDI1394P21 - 3-port physical layer interface

Datasheet Summary

Description

The PDI1394P21 provides the digital and analog transceiver functions needed to implement a three port node in a cable-based IEEE 1394

1995 and/or 1394a network.

Each cable port incorporates two differential line transceivers.

Features

Fully supports provisions of IEEE 1394.
1995 Standard for high performance serial bus and the P1394a supplement (Version 2.0)1.
Interface to link-layer controller supports low-cost bus-holder isolation and optional Annex J electrical isolation.
Full P1394a support includes:.
Connection debounce.
Arbitrated short reset.
Multispeed concatenation.
Arbitration acceleration.
Fly-by concatenation.
Port disable/.

NXP

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Datasheet Details

Part number	PDI1394P21
Manufacturer	NXP
File Size	148.37 KB
Description	3-port physical layer interface
Datasheet	PDI1394P21 Datasheet
Additional preview pages of the PDI1394P21 datasheet.

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Full PDF Text Transcription

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INTEGRATED CIRCUITS PDI1394P21 3-port physical layer interface Objective specification 1999 Jul 09 Philips Semiconductors Philips Semiconductors Objective specification 3-port physical layer interface PDI1394P21 1.0 FEATURES • Fully supports provisions of IEEE 1394–1995 Standard for high performance serial bus and the P1394a supplement (Version 2.0)1 • Interface to link-layer controller supports low-cost bus-holder isolation and optional Annex J electrical isolation • Full P1394a support includes: – Connection debounce – Arbitrated short reset – Multispeed concatenation – Arbitration acceleration – Fly-by concatenation – Port disable/suspend/resume • Data interface to link-layer controller through 2/4/8 parallel lines at 49.152 MHz • Low-cost 24.

Published: Mar 22, 2005 |