PLS101, PLS100 Datasheet - NXP

PLS101 - (PLS100 / PLS101) Programmable logic arrays

The PLS100 (3-State) and PLS101 (Open Collector) are bipolar, fuse Programmable Logic Arrays (PLAs). Each device utilizes the standard AND/OR/Invert architecture to directly implement custom sum of product equations. Each device consists of 16 dedicated inputs and 8 dedicated outputs. Each output is.

PLS101 Features

* Field-programmable (Ni-Cr link)

* Input variables: 16

* Output functions: 8

* Product terms: 48

* I/O propagation delay: 50ns (max.)

* Power dissipation: 600mW (typ.)

* Input loading:

* 100µA (max.)

* Chip Enable input

PLS100_PhilipsSemiconductors.pdf