PLS100 Datasheet - NXP

PLS100 - (PLS100 / PLS101) Programmable logic arrays

The PLS100 (3-State) and PLS101 (Open Collector) are bipolar, fuse Programmable Logic Arrays (PLAs).

Each device utilizes the standard AND/OR/Invert architecture to directly implement custom sum of product equations.

Each device consists of 16 dedicated inputs and 8 dedicated outputs.

Each output is

PLS100 Features

* Field-programmable (Ni-Cr link)

* Input variables: 16

* Output functions: 8

* Product terms: 48

* I/O propagation delay: 50ns (max.)

* Power dissipation: 600mW (typ.)

* Input loading:

* 100µA (max.)

* Chip Enable input

Datasheet Details

PLS100

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(pls100 / pls101) programmable logic arrays.

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