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PLS101 - (PLS100 / PLS101) Programmable logic arrays

Download the PLS101 datasheet PDF. This datasheet also covers the PLS100 variant, as both devices belong to the same (pls100 / pls101) programmable logic arrays family and are provided as variant models within a single manufacturer datasheet.

General Description

The PLS100 (3-State) and PLS101 (Open Collector) are bipolar, fuse Programmable Logic Arrays (PLAs).

Each device utilizes the standard AND/OR/Invert architecture to directly implement custom sum of product equations.

Each device consists of 16 dedicated inputs and 8 dedicated outputs.

Key Features

  • Field-programmable (Ni-Cr link).
  • Input variables: 16.
  • Output functions: 8.
  • Product terms: 48.
  • I/O propagation delay: 50ns (max. ).
  • Power dissipation: 600mW (typ. ).
  • Input loading:.
  • 100µA (max. ).
  • Chip Enable input.
  • Output option:.
  • PLS100: 3-State.
  • PLS101: Open-Collector PIN.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (PLS100_PhilipsSemiconductors.pdf) that lists specifications for multiple related part numbers.

Other Datasheets by NXP Semiconductors

Part Number Description
PLS100 (PLS100 / PLS101) Programmable logic arrays
PLS105 Field-Programmable Logic Sequencer
PLS155 Programmable Logic Sequencer
PLS159A Programmable logic sequencer 16 x 45 x 12
PLS167 FIELD PROGRAMMABLE LOGIC SEQUENCER
PLS167A FIELD PROGRAMMABLE LOGIC SEQUENCER
PLS168 FIELD PROGRAMMABLE LOGIC SEQUENCER
PLS173 Programmable logic array

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Philips Semiconductors Programmable Logic Devices Product specification Programmable logic arrays (16 × 48 × 8) PLS100/PLS101 DESCRIPTION The PLS100 (3-State) and PLS101 (Open Collector) are bipolar, fuse Programmable Logic Arrays (PLAs). Each device utilizes the standard AND/OR/Invert architecture to directly implement custom sum of product equations. Each device consists of 16 dedicated inputs and 8 dedicated outputs. Each output is capable of being actively controlled by any or all of the 48 product terms. The True, Complement, or Don’t Care condition of each of the 16 inputs and be ANDed together to comprise one P-term. All 48 P-terms can be selectively ORed to each output.