S32R372 - 32-bit CPU

NXP

S32R372 Datasheet Preview — Preview of S32R372 PDF

Datasheet Details

Part number	S32R372
Manufacturer	NXP ↗
File Size	948.55 KB
Description	32-bit CPU
Datasheet	S32R372-NXP.pdf

S32R372 Product details

Description

9 9.2 LINFlexD timing specifications39 3.2 Format 9 9.3 I2C timing 39 3.3 Fields 9 10 Debug modules40 4 General 11 10.1 JTAG/CJTAG interface timing 40 4.1 Introduction 11 10.2 Nexus Aurora debug port timing43 4.2 Absolute maximum ratings 11 11 WKPU/NMI timing specifications44 4.3 Operating conditions 13 12 External interrupt timing (IRQ pin)

Features

Dual issue computation cores: Power Architecture® e200z7 32-bit CPU.
1.3 MB on-chip code flash memory (FMC flash memory) with ECC.
1 MB on-chip SRAM with ECC.
RADAR processing.
Signal Processing Toolbox (SPT) for RADAR signal processing acceleration.
Cross Triggering Engine (CTE) for precise timing generation and triggering.
MIPICSI2 interface to connect external RADAR RX ADCs.
Memory protection.
Each core memory p.

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Published: Jul 13, 2020 |