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74HCT03 Quad 2-input NAND gate

74HCT03 Description

INTEGRATED CIRCUITS www.DataSheet4U.com DATA SHEET For a complete data sheet, please also download: * The IC06 74HC/HCT/HCU/HCMOS Logic Famil.
The 74HC/HCT03 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).

74HCT03 Features

* Level shift capability
* Output capability: standard (open drain)

74HCT03 Applications

* these devices must have a pull-up resistor to establish a logic HIGH level. TYPICAL SYMBOL tPZL/ tPLZ CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2× fi + ∑ (CL × VCC2 × fo) + ∑ (VO2/RL) × duty factor LOW, where: fi = input frequency in MHz fo =

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Quad 2-input NAND gate NXP Semiconductors
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