Datasheet Details
- Part number
- 74LVC2G74
- Manufacturer
- NXP ↗ Semiconductors
- File Size
- 153.62 KB
- Datasheet
- 74LVC2G74_NXPSemiconductors.pdf
- Description
- Single D-type flip-flop
74LVC2G74 Description
74LVC2G74 Rev.06 * 23 December 2009 www.DataSheet4U.com Single D-type flip-flop with set and reset; positive edge trigger Product data sheet .74LVC2G74 Features
* I I I I Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant inputs for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: N JESD8-7 (1.65 V to 1.95 V) N JESD8-5 (2.3 V to 2.7 V) N JESD8-B/JESD36 (2.7 V to 3.6 V) ±24 mA output drive (VCC = 3.0 V) ESD protection: N HB74LVC2G74 Applications
* using IOFF. The IOFF circuitry disables the output, preventing damaging backflow current through the device when it is powered down. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. Information on the data input is transferred to the Q output on the L📁 Related Datasheet
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