NT5CB256M8BN Datasheet, B-die, Nanya

✔ NT5CB256M8BN Features

and all of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of differential c

✔ NT5CB256M8BN Application

The chip is designed to comply with all key DDR3 DRAM key features and all of the control and address input

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NT5CB256M8BN

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📄 Datasheet

Description:

2gb ddr3 sdram b-die. The 2Gb Double-Data-Rate-3 (DDR3) DRAMs is a high-speed CMOS Double Data Rate32 SDRAM containing 2,147,483,648 bits. It is internally

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NT5CB256M8BN 2Gb DDR3 SDRAM B-Die Nanya