Description
1Gb DDR3 SDRAM NT5CB128M8DN / NT5CB64M16DP NT5CC128M8DN / NT5CC64M16DP .
The 1Gb Double-Data-Rate-3 (DDR3/L) B-die DRAMs is double data rate architecture to achieve high-speed operation.
Features
* and all of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of differential clocks (CK rising and falling). All I/Os are synchronized with a single ended DQS or differential DQS pair in a source synchrono
Applications
* The timing specification of high speed bin is backward compatible with low speed bin
* 8 Internal memory banks (BA0- BA2)
* Differential clock input (CK, )
* Programmable Latency: 5, 6, 7, 8, 9,
10, 11, 12, 13, (14)
* POSTED CAS ADDITIVE Programmable Additive
Latency: 0,
