Description
www.DataSheet4U.com 54AC109 * 54ACT109 Dual JK Positive Edge-Triggered Flip-Flop August 1998 54AC109 * 54ACT109 Dual JK Positive Ed.
The ’AC/’ACT109 consists of two high-speed completely independent transition clocked JK flip-flops.
Features
* n n n n ICC reduced by 50% Outputs source/sink 24 mA ’ACT109 has TTL-compatible inputs Standard Military Drawing (SMD)
* ’AC109: 5962-89551
* ’ACT109: 5962-88534
Logic Symbol
IEEE/IEC
DS100267-1 DS100267-7
Pin Names J1, J2, K1, K2 CP1, CP2 CD1, CD2 SD1, SD2 Q1, Q2, Q1, Q2
DS10026