54F219 Datasheet - National Semiconductor

54F219 64-Bit Random Access Memory

The ’F219 is a high-speed 64-bit RAM organized as a 16-word by 4-bit array Address inputs are buffered to minimize loading and are fully decoded on-chip The outputs are TRI-STATE and are in the high-impedance state whenever the Chip Select (CS) input is HIGH The outputs are active only in the Read m.

54F219 Features

* non-inverting rather than inverting data outputs Features Y TRI-STATE outputs for data bus applications Y Buffered inputs minimize loading Y Address decoding on-chip Y Diode clamped inputs minimize ringing Y Available in SOIC (300 mil only) Commercial 74F219PC 74F219SC (Note 1) 74F219SJ (Note 1)

54F219 Datasheet (360.98 KB)