74LS273 Datasheet - National Semiconductor

Features

* Y Y Y Y Edge-triggered 8-bit high speed register Parallel in and out Common clock and master reset Connection Diagram Dual-In-Line Package TL F 9825

* 1 Order Number DM54LS273E DM54LS273J DM54LS273W DM74LS273M or DM74LS273N See NS Package Number E20A J20A M20B N20A or W20A Pin Names CP D