CD4035BM Datasheet, Register, National Semiconductor

CD4035BM Features

• Register Y Y Y Y Y Y Y Y Y Y Y Y Wide supply voltage range 3 0V to 15V High noise immunity 0 45 VDD (typ ) Low power TTL Fan out of 2 driving 74L compatibility or 1 driving 74LS 4-stage clocke

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CD4035BM

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National Semiconductor

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📄 Datasheet

Description:

4-bit parallel-in/parallel-out shift register. The CD4035B 4-bit parallel-in parallel-out shift register is a monolithic complementary MOS (CMOS) integrated circuit constructed wit

CD4035BM Application

• Applications With JK inputs connected together the first stage becomes a ‘‘D’’ flip-flop An asynchronous common reset is also provided Features Y Y

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CD4035BM

National Semiconductor

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