Description
CGS74C2525 CGS74CT2525 CGS74C2526 CGS74CT2526 1-to-8 Minimum Skew Clock Driver September 1995 CGS74C2525 CGS74CT2525 CGS74C2526 CGS74CT252.
On the multiplexed clock device the SEL pin is used to determine which CLKn input will have an active effect on the outputs of the circuit When SEL e.
Features
* Y These CGS devices implement National’s FACTTM family
Y Ideal for signal generation and clock distribution Y Guaranteed pin to pin and part to part skew Y Multiplexed clock input (’2526) Y Guaranteed 2 kV minimum ESD protection Y Symmetric output current drive of 24 mA for IOL IOH Y ’CT has TTL-com
Applications
* The ’2525 is designed to distribute a single clock to eight separate receivers with low skew across all outputs during both the tPLH and tPHL transitions The ’2526 is similar to the ’2525 but contains a multiplexed clock input to allow for systems with dual clock speeds or systems where a separate t