DS90CR485 Datasheet - National Semiconductor

DS90CR485 133MHz 48-bit Channel Link Serializer

The DS90CR485 serializes the 24 LVCMOS/LVTTL double edge inputs (48 bits data latched in per clock cycle) onto 8 Low Voltage Differential Signaling (LVDS) streams. A phaselocked transmit clock is also in parallel with the data streams over a 9th LVDS link. The reduction of the wide TTL bus to a few .

DS90CR485 Features

* n n n n n n n n n n n Up to 6.384 Gbps throughput 66MHz to 133MHz input clock support Reduces cable and connector size and cost Pre-emphasis reduces cable loading effects DC balance reduces ISI distortion 24 bit double edge inputs 3V Tolerant LVCMOS/LVTTL inputs Low power, 2.5V supply Flow-through p

DS90CR485 Datasheet (330.13 KB)