MG65P Datasheet - OKI electronic componets

MG65P 0.25m Embedded DRAM/ Customer Structured Arrays

Oki’s 0.25 µm MG63P/64P/65P Application-Specific Integrated Circuit (ASIC) provides the ability to embed large blocks of Synchronous DRAM (SDRAM) into an embedded array architecture called the Customer Structured Array (CSA). Utilizing Oki’s leadership in DRAM technologies and wide experience of emb.

MG65P Features

* 0.25µm drawn 3-, 4-, and 5-layer metal CMOS Optimized 2.5-V core Optimized 3-V I/O CSA architecture availability 100 MHz embedded SDRAM cores up to 16 Mb per occurrence 77-ps typical logic gate propagation delay (for a 4x-drive inverter gat

MG65P Datasheet (267.61 KB)