* 0.25µm drawn 3-, 4-, and 5-layer metal CMOS Optimized 2.5-V core Optimized 3-V I/O CSA architecture availability 100 MHz embedded SDRAM cores up to 16 Mb per occurrence 77-ps typical logic gate propagation delay (for a 4x-drive inverter gat
MG63P
OKI electronic componets
267.61 KB
0.25m embedded dram/ customer structured arrays.
DATA SHEET
O K I A S I C P R O D U C T S
MG63P/64P/65P 0.25µm Embedded DRAM/ Customer Structured Arrays
November 1998
MG63P/64P/65P
0.25µm Embedded .
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