MG65P - 0.25m Embedded DRAM/ Customer Structured Arrays

OKI electronic componets

MG65P Datasheet Preview — Preview of MG65P PDF

Datasheet Details

Part number	MG65P
Manufacturer	OKI electronic componets
File Size	267.61 KB
Description	0.25m Embedded DRAM/ Customer Structured Arrays
Datasheet	MG65P_OKIelectroniccomponets.pdf

MG65P Product details

Description

Oki’s 0.25 µm MG63P/64P/65P Application-Specific Integrated Circuit (ASIC) provides the ability to embed large blocks of Synchronous DRAM (SDRAM) into an embedded array architecture called the Customer Structured Array (CSA).

Features

0.25µm drawn 3-, 4-, and 5-layer metal CMOS Optimized 2.5-V core Optimized 3-V I/O CSA architecture availability 100 MHz embedded SDRAM cores up to 16 Mb per occurrence 77-ps typical logic gate propagation delay (for a 4x-drive inverter gate with a fanout of 2 and 0 mm of wire, operating at 2.5 V) Over 5.4M raw gates and 868 I/O pads using 60µ staggered I/O User-configurable I/O with VSS, VDD, TTL, 3-state, and 1- to 24-mA options Slew-.

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Other Datasheets by OKI electronic componets

MG63P - 0.25m Embedded DRAM/ Customer Structured Arrays
MG64P - 0.25m Embedded DRAM/ Customer Structured Arrays

Published: Apr 29, 2005 |