74LS76
SN74LS76A Dual JK Flip-Flop with Set and Clear
The SN74LS76A offers individual J, K, Clock Pulse, Direct Set and Direct Clear inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The Logic Level of the J and K inputs will perform according to the Truth Table as long as minimum set-up times are observed. Input data is transferred to the outputs on the HIGH-to-LOW clock transitions. http://onsemi.
LOW POWER SCHOTTKY
MODE SELECT
- TRUTH TABLE
OPERATING MODE Set Reset (Clear)
- Undetermined Toggle Load “0” (Reset) Load “1” (Set) Hold
- INPUTS SD L H L H H H H CD H L L H H H H J X X X h l h l K X X X h h l l OUTPUTS Q H L H q L H q Q L H H q H L q
16 1
Both outputs will be HIGH while both SD and CD are LOW, but the output states are unpredictable if SD and CD go HIGH simultaneously.
PLASTIC N SUFFIX CASE 648
H, h = HIGH Voltage Level L, I = LOW Voltage Level X = Immaterial l, h (q) = Lower case letters indicate...
