74LS76A Datasheet | onsemi

SN74LS76A Dual JK Flip-Flop with Set and Clear The SN74LS76A offers individual J, K, Clock Pulse, Direct Set and Direct Clear inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The Logic Level of the J and K inputs will perform according to the Truth Table as long as minimum set-up times are observed. Input data is transferred to the outputs on the HIGH-to-LOW clock transitions. MODE SELECT - TRUTH TABLE OPERATING INPUTS OUTPUTS MODE SD CD Set L H X X H L Reset (Clear) HLXXLH - Undetermined L L XXHH Toggle HHh h q q Load “0” (Reset) H H l h L H Load “1” (Set) HHh l HL Hold HH l l qq - Both outputs will be HIGH while both SD and CD are LOW, but the output states are unpredictable if SD and CD go HIGH simultaneously. H, h = HIGH Voltage Level L, I = LOW Voltage Level X = Immaterial l, h (q) = Lower case letters indicate the state of the referenced input i, h (q) = (or output) one setup time prior to the HIGH- to- LOW clock transition http://onsemi. LOW POWER SCHOTTKY 16 1 PLASTIC N SUFFIX CASE 648 16 1 SOIC D SUFFIX CASE 751B GUARANTEED OPERATING RANGES Symbol Parameter Min Typ Max Unit VCC Supply Voltage TA Operating Ambient Temperature...