74LS76A
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Dual jk flip-flop.
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74LS76 - Dual JK Flip-Flop
(ON Semiconductor)
SN74LS76A Dual JK Flip-Flop with Set and Clear
The SN74LS76A offers individual J, K, Clock Pulse, Direct Set and Direct Clear inputs. These dual flip-.
74LS76 - Dual J-K Flip-Flop
(Hitachi Semiconductor)
19.20 20.00 Max 16 9 7.40 Max 6.30
Unit: mm
1 1.3
1.11 Max
8
0.51 Min
2.54 Min 5.06 Max
7.62
2.54 ± 0.25
0.48 ± 0.10
0.25 – 0.05 0° – 15°
Hit.
74LS76 - DUAL JK FLIP-FLOP
(ETC)
.
74LS76 - DUAL J-K FLIP-FLOPS
(Texas Instruments)
SN5476, SN54LS76A
SN7476, SN74LS76A
DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR
SDLS121 – DECEMBER 1983 – REVISED MARCH 1988
PRODUCTION DATA informatio.
74LS76A - DUAL J-K FLIP-FLOPS
(Texas Instruments)
SN5476, SN54LS76A
SN7476, SN74LS76A
DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR
SDLS121 – DECEMBER 1983 – REVISED MARCH 1988
PRODUCTION DATA informatio.
74LS76A - DUAL JK FLIP-FLOP
(Motorola)
DUAL JK FLIP-FLOP WITH SET AND CLEAR
The SN54 / 74LS76A offers individual J, K, Clock Pulse, Direct Set and Direct Clear inputs. These dual flip-flops.
74LS73 - Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops
(Fairchild Semiconductor)
DM74LS73A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
August 1986 Revised March 2000
DM74LS73A Dua.
74LS73 - Dual J-K Flip-Flops
(Hitachi Semiconductor)
Unit: mm
19.20 20.32 Max 14 8 6.30 7.40 Max 1
2.39 Max
1.30
7 7.62
0.51 Min
2.54 Min 5.06 Max
2.54 ± 0.25
0.48 ± 0.10
0.25 – 0.05 0° – 15°
+ 0.
74LS73 - DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
(Motorola)
SN54/74LS73A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
The SN54LS / 74LS73A offers individual J, K, clear, and clock inputs. These dual flip-flops are.
74LS73A - Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops
(Fairchild Semiconductor)
DM74LS73A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
August 1986 Revised March 2000
DM74LS73A Dua.
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