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MC100LVEL14 1:5 Clock Distribution Chip

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Description

MC100LVEL14 3.3 V ECL 1:5 Clock Distribution Chip .
The MC100LVEL14 is a low skew 1:5 clock distribution chip designed explicitly for low skew clock distribution applications.

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Features

* a multiplexed clock input to allow for the distribution of a lower speed scan or test clock along with the high speed system clock. When LOW (or left open and pulled LOW by the input pulldown resistor) the SEL pin will select the differential clock input. The common enable (EN) is synchronous so tha

Applications

* The device can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. The LVEL14 is functionally and pin compatible with the EL14 but is designed to operate in ECL or PECL mode for a voltage supply range of
* 3.0 V to
* 3.8 V

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