* z Clock frequency: 166, 133 MHz z Fully synchronous; all signals referenced to a positive clock edge z Four banks operation z Single 3.3V power supply z LVTTL interface z Programmable burst length 1, 2, 4, 8, full page z Programmable burst sequence: Sequential/Interleave z 8192 refresh cycles /64ms
PMS308416B Datasheet (2.08 MB)
PMS308416B
PM Tech
2.08 MB
256mb sdram.
πPM Tech
Document Title
256Mb (16Mb x 16) SDRAM Datasheet
Revision History
Revision 0.1
Date March, 2010
Page ―
Original
PMS308416B
Notes
This .
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