MN3304 Datasheet (Panasonic Semiconductor) - 512-Stage Ultra Low Voltage Operation BBD for Audio Signals

MN3304, 512-Stage Ultra Low Voltage Operation BBD for Audio Signals

Pin No.

Symbol 1 2 3 4 GND CP2 IN VDD Pin Name Ground pin Clock input 2 Signal input pin VDD apply pin Connected to ground.

Basic clock pulse is applied to transfer electric charge of BBD.

Analog signal to be delayed is input.

Most suitable DC bias should be applied to this pin.

Bias is applied to

MN3304 Features

* Variable signal delay of the audio signal : 0.256 to 25.6 ms

* Wide range of supply voltage : 1.8 to 5.0 V

* No insertion loss : Li=0 dB typ.

* Wide dynamic range : S/N=73 dB typ.

* Low distortion : THD=0.7 % typ. (Vi=0.22 Vrms)

* Clock frequency ran