PI6C5946002 Datasheet - Pericom Semiconductor

PI6C5946002 6 GHz / 12 Gbps Clock / Data Fanout Buffer

The PI6C5946002 is a high-performance low-skew 1-to-2 CML clock or data fanout buffer. The inputs accept CML, LVDS, CML and SSTL signals with internal termination resistors. PI6C5946002 is ideal for clock / data distribution applications. Block Diagram Pin Configuration DNC DNC VDD GND REF_IN+ V.

PI6C5946002 Features

* ÎÎInput Clock Frequency up to 6 GHz Typical ÎÎMaximum Input Data Rate up to 12 Gbps Typical ÎÎ2 pairs of differential CML outputs ÎÎLow additive jitter, < 0.05ps (max) ÎÎInput accepts: CML, LVDS, CML, SSTL input level ÎÎOutput to Output skew:

PI6C5946002-PericomSemiconductor.pdf