Description
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 123456789.
The PI90LV02 and PI90LVT02 are single differential line receivers that use low-voltage differential signaling (LVDS) to support data rates up to 400 M.
Features
* Meets or Exceeds the Requirements of ANSI TIA/EIA-644-1995 Standard
* Signaling rates up to 400 Mbps
* Interfaces to LVDS, LVPECL
* Bus-Terminal ESD exceeds 10kV
* Differential Input Voltage Threshold less than 100mV
* Typical Propagation Delay Times
Applications
* requiring high-speed, low-power consumption, low-noise generation, and a small package. A differential input signal (350mV) is translated by the device to a 3.3V CMOS output level. The PI90LVT02 integrates the terminating resistor while the PI90LV02 requires an external resistor. Applications
Appli