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32 Hits
Embedded-DisplayPort (eDP) Output 2-lane/4-lane eDP @ 1.62/2.7Gbps per lane FHD to WQXGA (2560*1600) supported Up to 6dB pre-emphasis
RGB Input 18/24...
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20 Hits
• A Member of the MuxIt™ SerializerDeserializer Building-Block Chip Family
• Pin Selectable Frequency Multiplier Ratios Between 4 and 40
• Input Clock...
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17 Hits
• Two Line Receivers and Eight ('109) or Sixteen ('117) Line Drivers Meet or Exceed the Requirements of ANSI EIA/TIA-644 Standard
• Typical Data Signa...
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15 Hits
• Typically Meets or Exceeds ANSI TIA/EIA-644-1995 Standard
• Operates From a Single 2.4-V to 3.6-V Supply • Signaling Rates up to 400 Mbit/s • Bus-Te...
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14 Hits
n n n n n n n n n Up to 140 Megabyte/sec Bandwidth Narrow bus reduces cable size and cost 290 mV swing LVDS devices for low EMI Low power CMOS design ...
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14 Hits
Transmit 18bit data and 4bit control data via a single differential cable
Wide frequency range: 5MHz to 40MHz Support SYNC pattern and LOCK indi...
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13 Hits
n Low jitter 800 Mbps fully differential data path n 75 ps (typ) of pk-pk jitter with PRBS = 223−1 data pattern at 800 Mbps n Single +3.3 V Supply n L...
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13 Hits
n n n n n n n n n n n n n 20 to 65 MHz shift clk support Up to 227 Mbytes/s bandwidth Cable size is reduced to save cost 290 mV swing LVDS devices for...
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13 Hits
• Four differential LVDS output pairs • IN, nIN input pairs can accept the following differential input levels:
LVPECL, LVDS, SSTL
• 50 internal inpu...
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