PLL52C63-01 Datasheet - PhaseLink

PLL52C63-01 Pentium/SDRAM Clock Generator

NAME VDD VDDq2 VSS XIN XOUT BCLK_F/F1 * BCLK_0/F2 * 48MHZ/F0 * BCLK_F, BCLK(0:5) PCLK(0:3) SDRAM(0:11) SDATA SCLK BCLK5//PCISTP REF1//CPUSTP 48MHZ/F0 * 24MHZ/MODE * REF(0:1) IOAPIC PIN NUM BER 1,6,14, 19,30,36 42,48 3,9,16,22 27,33,39,45 4 5 7,8,26 7,8,10,11 12,13,15 44,43,41,40 38,3.

PLL52C63-01 Features

* n Generates all clock frequencies for Pentium (II), AMD and Cyrix system requiring multiple CPU clocks. n Supports up to16 Synchronous CPU clocks (4 CPU and 12 SDRAM) and 7 Synchronous PCI BUS clocks. n Two 14.318Mhz reference clocks and one 2.5V IOAPIC n One 24Mhz floppy clock and one 48Mhz USB clo

PLL52C63-01-PhaseLink.pdf