* Support for acquisition, display and deflection PLL
* 50/100 Hz (or 60/120 Hz) scan conversion
* Progressive scan 50 Hz/1250 lines (60 Hz/1050 lines) interlaced or 50 Hz/625 lines (60 Hz/525 lines) non-interlaced in serial memory structure
* 50 Hz/625 lines (60 Hz/5
SAA4952WP Datasheet (159.15 KB)
SAA4952WP
Philips
159.15 KB
Memory controller.
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DATA SHEET
SAA4952WP Memory controller
Objective specification File under Integrated Circuits, IC02 1997 Jun 10
Philips Semicond.
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