| Part number | A2S56D30CTP, A2S56D40CTP |
|---|---|
| Manufacturer | Powerchip Semiconductor |
| File Size | 620.59 KB |
| Description | 256Mb DDR SDRAM |
| Datasheet |
 A2S56D40CTP_PowerchipSemiconductor.pdf
|
| Note |
This datasheet PDF includes multiple part numbers: A2S56D30CTP, A2S56D40CTP. Please refer to the document for exact specifications by model. |
A2S56D20CTP is a 4-bank x 16,777,216-word x 4-bit, A2S56D30CTP is a 4-bank x 8,388,608-word x 8bit, A2S56D40CTP is a 4-bank x 4,194,304-word x 16bit double data rate synchronous DRAM , with SSTL_2 interface.All control and address signals are referenced to the rising edge of CLK.Input data is registered on both edges of data strob , and output data and data strobe are referenced on both edges of CLK.The A2S56D20/30/40 CTP achieves very high speed clock rate up to 200 MHz .
