* - Vdd=Vddq=2.5V ± 0.2V power supply for -6,-75. -Vdd=Vddq=2.6V ± 0.1V power supply for -5. - Double data rate architecture ; two data transfers per clock cycle. - Bidirectional , data strob (DQS) is transmitted/received with data - Differential clock input (CLK and /CLK) - DLL aligns DQ and DQS tran
A2S56D40CTP Datasheet (620.59 KB)
A2S56D40CTP
Powerchip Semiconductor
620.59 KB
256mb ddr sdram.
www.DataSheet4U.com 256Mb DDR SDRAM Specification A2S56D20CTP A2S56D30CTP A2S56D40CTP Powerchip Semiconductor Corp. No.12, Li-Hsin Rd.1, Science-bas.
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