A2S56D40CTP Datasheet - Powerchip Semiconductor

A2S56D40CTP, 256Mb DDR SDRAM

www.DataSheet4U.com 256Mb DDR SDRAM Specification A2S56D20CTP A2S56D30CTP A2S56D40CTP Powerchip Semiconductor Corp.No.12, Li-Hsin Rd.1, Science-bas.
A2S56D20CTP is a 4-bank x 16,777,216-word x 4-bit, A2S56D30CTP is a 4-bank x 8,388,608-word x 8bit, A2S56D40CTP is a 4-bank x 4,194,304-word x 16bit.

Features

* - Vdd=Vddq=2.5V ± 0.2V power supply for -6,-75. -Vdd=Vddq=2.6V ± 0.1V power supply for -5. - Double data rate architecture ; two data transfers per clock cycle. - Bidirectional , data strob (DQS) is transmitted/received with data - Differential clock input (CLK and /CLK) - DLL aligns DQ and DQS tran

A2S56D40CTP_PowerchipSemiconductor.pdf