PCS3P624Z09B Description
May 2008 rev 0.1 PCS3P624Z05B/C PCS3P624Z09B/C High Frequency Timing-Safe™ Peak EMI reduction IC www.DataSheet4U.com General .PCS3P624Z09B Features
* High Frequency Clock distribution with TimingSafe™ Peak EMI Reduction Input frequency range: 50MHz - 100MHz Multiple low skew Timing-safe™ Outputs: PCS3P624Z05: 5 Outputs PCS3P624Z09: 9 OutputsPCS3P624Z09B Applications
* requiring zero input-output delay, all outputs, including DLY_CTRL, must be equally loaded. Even if DLY_CTRL is not used, it must have a capacitive load equal to that on other outputs, for obtaining zeroinput-output delay. Timing-Safe™ technology Timing-Safe™ technology is the ability to modulate a
📁 Related Datasheet
📌 All Tags
