PCS3P625Z05C Description
May 2008 rev 0.1 PCS3P625Z05B/C PCS3P625Z09B/C High Frequency Timing-Safe™ Peak EMI reduction IC www.DataSheet4U.com General .PCS3P625Z05C Features
* High Frequency Clock distribution with TimingSafe™ Peak EMI Reduction Input frequency range: 100MHz - 175MHz Multiple low skew Timing-safe™ Outputs: PCS3P625Z05: 5 Outputs PCS3P625Z09: 9 OutputsPCS3P625Z05C Applications
* requiring zero input-output delay, all outputs, including DLY_CTRL, must be equally loaded. Even if DLY_CTRL is not used, it must have a capacitive load equal to that on other outputs, for obtaining zeroinput-output delay. Timing-Safe™ technology Timing-Safe™ technology is the ability to modulate a
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