Description
March 2007 www.DataSheet4U.com HYS72T32000HR *[2.5/3/3S/3.7/5] *A HYS72T64001HR *[2.5/3/3S/3.7/5] *A HYS72T64020HR
devices and a PLL for the clock distribution.
Features
* Programmable CAS Latencies (3, 4, 5 & 6), Burst Length (4 & 8) and Burst Type
* Auto Refresh (CBR) and Self Refresh
* All inputs and outputs SSTL_18 compatible
* Off-Chip Driver Impedance Adjustment (OCD) and On-Die Termination (ODT)
* Serial Presence Detect
Applications
* One rank 32M x 72, 64M x 72 and two ranks 64M × 72 module organization and 32M × 8, 64M × 4 chip organization
* Standard Double-Data-Rate-Two Synchronous DRAMs (DDR2 SDRAM) with a single + 1.8 V (± 0.1 V) power supply
* All Speed Grades faster than DDR2
* 400 comply w
