QL16X24B Datasheet (QuickLogic) - Very-High-Speed CMOS FPGA

QL16X24B, Very-High-Speed CMOS FPGA

www.DataSheet4U.com QL16x24B pASIC® 1 Family Very-High-Speed CMOS FPGA Rev C pASIC HIGHLIGHTS Very High Speed ViaLink® metal-to-metal programmable via antifuse technology, allows counter speeds over 150 MHz and logic cell delays of under 2 ns.

High Usable Density A 16-by-24 array of 384 logic cells provides 4,000 usable ASIC gates (7,000 PLD gates) in 84-pin PLCC, 100-pin and 144-pin TQFP, 144-pin CPGA and 160-pin CQFP packages.

Low-Power, High-Output Drive

QL16X24B Features

* Total of 122 I/O pins

* 114 Bidirectional Input/Output pins

* 6 Dedicated Input/High-Drive pins

* 2 Clock/Dedicated input pins with fanout-independent, low-skew clock networks Input + logic cell + output delays under 6 ns Chip-to-chip operating frequencies up to 110 MHz Inter