82P33741 Datasheet - Renesas

82P33741 Port Synchronizer

The 82P33741 Port Synchronizer for IEEE 1588 and 10G/40G Synchronous Ethernet provides tools to manage timing references, clock conversion and timing paths for IEEE 1588 and Synchronous Ethernet (SyncE). The device supports up to three independent timing paths for: IEEE 1588 clock generation; SyncE .

Port Synchronizer for IEEE 1588 and 10G/ 40G/ 100G Synchronous Ethernet 82P33741 Datasheet HIGHLIGHTS DPLL1 and DPLL2 can be used on line cards to manage the generation of synchronous port clocks and IEEE 1588 synchronization signals based on multiple system backplane references DPLL3 can be used on line cards to select incoming line clocks for use on system backplanes; it can also be used for general purpose timing applications APLL1 and APLL2 generate clocks wit.

82P33741 Features

* Differential reference inputs (IN1 to IN6) accept clock frequencies between 2 kHz and 650 MHz

* Single ended inputs (IN7 to IN12) accept reference clock frequencies between 2 kHz and 162.5 MHz

* Loss of Signal (LOS) pins (LOS0 to LOS3) can be assigned to any clock reference

82P33741 Datasheet (0.97 MB)