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82P33741 Datasheet - Renesas

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82P33741 Port Synchronizer

Port Synchronizer for IEEE 1588 and 10G/ 40G/ 100G Synchronous Ethernet 82P33741 Datasheet HIGHLIGHTS * DPLL1 and DPLL2 can be used on line .
The 82P33741 Port Synchronizer for IEEE 1588 and 10G/40G Synchronous Ethernet provides tools to manage timing references, clock conversion and timing.

82P33741-Renesas.pdf

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Datasheet Details

Part number:

82P33741

Manufacturer:

Renesas ↗

File Size:

0.97 MB

Description:

Port Synchronizer

Features

* Differential reference inputs (IN1 to IN6) accept clock frequencies between 2 kHz and 650 MHz
* Single ended inputs (IN7 to IN12) accept reference clock frequencies between 2 kHz and 162.5 MHz
* Loss of Signal (LOS) pins (LOS0 to LOS3) can be assigned to any clock reference

Applications

* APLL1 and APLL2 generate clocks with jitter < 1 ps RMS (12 kHz to 20 MHz) for: 1000BASE-T and 1000BASE-X ports and to generate IEEE 1588 time stamp clocks and 1 pulse per second (PPS) signals
* APLL3 is Voltage Controlled Crystal Oscillator (VCXO) based and generates clocks with ji

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