82V3001A Datasheet - Renesas

WAN PLL

82V3001A Features

* Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces

* Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timingfor E1 interface

* Selectable input reference signal: 8 kHz, 1.544 MHz or 2.048 MHz

* Provides ei

82V3001A General Description

The IDT82V3001A is a WAN PLL with single reference input. It contains a Digital Phase-Locked Loop (DPLL), which generates ST-BUS clocks and framing signals that are phase locked to a 2.048 MHz, 1.544 MHz or 8 kHz input reference. The IDT82V3001A provides eight types of clock signals (C1.5o, C3o, C6o.

82V3001A Datasheet (284.89 KB)