894D115I-01 - Clock/Data Recovery

Renesas

Datasheet Details

The 894D115I-01 is a clock and data recovery circuit.

Clock recovery for STM-4 (OC-12/STS-12) and STM-1 (OC-3/STS-3).
Input: NRZ data (622.08 or 155.52 Mbit/s).
Output: clock signal (622.08MHz or 155.52MHz) and retimed data signal at 622.08 or 155.52 Mbit/s.
Internal PLL for clock generation and clock recovery.
Differential inputs can accept LVPECL levels.
Differential LVPECL data and clock outputs.
Lock reference input and PLL lock output.
19.44MHz reference clock input.

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Published: Feb 3, 2021 |