8P73S674 Datasheet - Renesas

8P73S674, 1.8V LVPECL Clock Divider

1.8V LVPECL Clock Divider 8P73S674 DATA SHEET General Description The 8P73S674 is a 1.8V LVPECL Clock Divider and Fanout Buffer.
The device has bee

Features

* Clock signal division and distribution
* SiGe technology for high-frequency and fast signal rise/fall times
* Four low-skew LVPECL clock outputs
* Supports frequency division of ÷1, ÷2, ÷4 and ÷8
* Maximum Output frequency: 1GHz
* Output skew: 100ps

8P73S674-Renesas.pdf