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8P73S674 - 1.8V LVPECL Clock Divider

Renesas

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Datasheet Details

Part number	8P73S674
Manufacturer	Renesas ↗
File Size	447.34 KB
Description	1.8V LVPECL Clock Divider
Datasheet	8P73S674-Renesas.pdf

8P73S674 Product details

Description

The 8P73S674 is a 1.8V LVPECL Clock Divider and Fanout Buffer.

Features

Clock signal division and distribution.
SiGe technology for high-frequency and fast signal rise/fall times.
Four low-skew LVPECL clock outputs.
Supports frequency division of ÷1, ÷2, ÷4 and ÷8.
Maximum Output frequency: 1GHz.
Output skew: 100ps (maximum).
LVPECL output rise/fall time (20% - 80%): 220ps (maximum).
1.8V core and output supply mode.
Supports 1.8V I/O LVCMOS logic levels for all control pins.

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Published: Dec 13, 2020 |