RL78G1G - MCU

Renesas

Datasheet Details

Ultra-low power consumption technology.
VDD = single power supply voltage of 2.7 to 5.5 V.
HALT mode.
STOP mode.
SNOOZE mode RL78 CPU core.
CISC architecture with 3-stage pipeline.
Minimum instruction execution time: Can be changed from high-speed (0.04167 μs: @ 24 MHz operation with high-speed on-chip oscillator) to low-speed (1.0 μs: @1 MHz operation with high-speed on-chip oscillator).
Multiply/divide/multiply & accumulate instruc.

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Published: Apr 28, 2016 |