V103 - TRIPLE 10-BIT LVDS TRANSMITTER

Renesas

V103 Datasheet Preview — Preview of V103 PDF

Datasheet Details

Part number	V103
Manufacturer	Renesas ↗
File Size	362.51 KB
Description	TRIPLE 10-BIT LVDS TRANSMITTER
Datasheet	V103-Renesas.pdf

V103 Product details

Description

The V103 LVDS display interface transmitter is primarily designed to support pixel data transmission between a video processing engine and a digital video display.

Features

Pin compatible with THine THC63LVD103.
Wide pixel clock range: 8 - 135 MHz.
Supports a wide range of video and graphics modes including VGA, SVGA, XGA, SXGA, SXGA+, NTSC, PAL, SDTV, and HDTV up to 1080I or 720P.
Internal PLL requires no external loop filter.
Selectable rising or falling clock edge for data alignment.
Compatible with Spread Spectrum clock source.
Reduced LVDS output voltage swing mode (selectable) to minimize EMI.

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Published: Jul 9, 2024 |