X5043 - 512 x 8 Bit CPU Supervisor

Renesas

Datasheet Details

a Serial Peripheral Interface (SPI) and software protocol allowing operation on a simple four-wire bus. The device utilizes Intersil’s proprietary Direct Write™ cell, providing a minimum endurance of 100,000 cycles and a minimum data retention of 100 years. Features.
Low VCC Detection and Reset Assertion - Four standard reset threshold voltages 4.63V, 4.38V, 2.93V, 2.63V - Re-program low VCC reset threshold voltage using special programming sequence. - Reset signal valid to VCC = 1V.

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Published: Sep 22, 2018 |