RT9173D Datasheet (Richtek) - Peak 3A Sink/Source Bus Termination Regulator

RT9173D, Peak 3A Sink/Source Bus Termination Regulator

The RT9173D is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in double data rate (DDR) memory system to comply with the JEDEC SSTL_2 and SSTL_18 or other specific interfaces such as HSTL, SCSI-2 and SCSI-3 etc.

devices requirements.

The regulator i

RT9173D Features

* include extremely low initial offset voltage, excellent load regulation, current limiting in bi-directions and on-chip thermal shut-down protection. The RT9173D are available in the SOP-8 (Exposed Pad) surface mount packages. Ordering Information RT9173D Package Type SP : SOP-8 (Exposed Pad-Optio